Struct arm_gic::gic_v2::GicCpuInterface

source ·

pub struct GicCpuInterface { /* private fields */ }

Expand description

The GIC CPU interface.

Each CPU interface block performs priority masking and preemption handling for a connected processor in the system.

Each CPU interface provides a programming interface for:

enabling the signaling of interrupt requests to the processor
acknowledging an interrupt
indicating completion of the processing of an interrupt
setting an interrupt priority mask for the processor
defining the preemption policy for the processor
determining the highest priority pending interrupt for the processor.

Implementations§

source §

impl GicCpuInterface

source

pub const fn new(base: *mut u8) -> Self

Construct a new GIC CPU interface instance from the base address.

source

pub fn iar(&self) -> u32

Returns the interrupt ID of the highest priority pending interrupt for the CPU interface. (read GICC_IAR)

The read returns a spurious interrupt ID of 1023 if the distributor or the CPU interface are disabled, or there is no pending interrupt on the CPU interface.

source

pub fn eoi(&self, iar: u32)

Informs the CPU interface that it has completed the processing of the specified interrupt. (write GICC_EOIR)

The value written must be the value returns from Self::iar.

source

pub fn handle_irq<F>(&self, handler: F)where F: FnOnce(u32),

handles the signaled interrupt.

It first reads GICC_IAR to obtain the pending interrupt ID and then calls the given handler. After the handler returns, it writes GICC_EOIR to acknowledge the interrupt.

If read GICC_IAR returns a spurious interrupt ID of 1023, it does nothing.

source