Struct arm_gic::gic_v2::GicDistributor

pub struct GicDistributor { /* private fields */ }

The GIC distributor.

The Distributor block performs interrupt prioritization and distribution to the CPU interface blocks that connect to the processors in the system.

The Distributor provides a programming interface for:

• Globally enabling the forwarding of interrupts to the CPU interfaces.
• Enabling or disabling each interrupt.
• Setting the priority level of each interrupt.
• Setting the target processor list of each interrupt.
• Setting each peripheral interrupt to be level-sensitive or edge-triggered.
• Setting each interrupt as either Group 0 or Group 1.
• Forwarding an SGI to one or more target processors.

In addition, the Distributor provides:

• visibility of the state of each interrupt
• a mechanism for software to set or clear the pending state of a peripheral interrupt.

Implementations

impl GicDistributor

pub const fn new(base: *mut u8) -> Self

Construct a new GIC distributor instance from the base address.

pub fn cpu_num(&self) -> usize

The number of implemented CPU interfaces.

pub fn max_irqs(&self) -> usize

The maximum number of interrupts that the GIC supports

pub fn configure_interrupt(&mut self, vector: usize, tm: TriggerMode)

Configures the trigger mode for the given interrupt.

pub fn set_enable(&mut self, vector: usize, enable: bool)

Enables or disables the given interrupt.

pub fn init(&mut self)

Initializes the GIC distributor.

It disables all interrupts, sets the target of all SPIs to CPU 0, configures all SPIs to be edge-triggered, and finally enables the GICD.

This function should be called only once.

Trait Implementations

impl Send for GicDistributor

impl Sync for GicDistributor